The present invention relates in general to integrated circuits and, more particularly, to a circuit for processing an image signal generated by a photoactive device.
High-resolution image capturing systems typically sense images with an array of semiconductor photoactive sensing devices such as charge-coupled devices, photodiodes and optotransistors. Such arrays are compact and operate at low power and therefore are ideal for use in portable equipment such as digital cameras and scanners. The photoactive sensing devices generate output signals representative of pixels of an image projected on the array. The image is projected through color filters or equivalent structures so that each photoactive device responds to one of the primary colors of light. The color-filtered pixel signals are combined to reproduce the colors of the image. For example, in an RGB system, each photoactive device is responsive to either red, green or blue light.
Pixel signals are sensed in a serial fashion to form an analog pixel stream at an output of the sensing array. To ensure compatibility with high definition television standards, the pixel stream is sensed and processed at a pixel rate of at least 27.0 megahertz. To reduce sensing noise, the pixel stream is sensed only during specific time slots. The best noise control for a given range of processing parameters and operating conditions is achieved when the time slots have equal widths.
Prior art systems achieve high pixel rates by sensing alternate pixels of the video stream in alternate sense amplifiers. For example, odd numbered pixels are sensed in a first sense amplifier, even numbered pixels are sensed in a second sense amplifier, and the resulting output signals of the alternate sense amplifiers are multiplexed into a single stream for further processing. A desired time slot for sensing the pixel signal is selected by comparing a programming code with a time slot count generated by a high frequency binary counter. The clock driving the binary counter operates at a frequency equal to the product of the sampling rate and the number of time slots per pixel signal period. For example, where the pixel signal operates at 27.0 megahertz and sixteen time slots are desired within the pixel signal, a clock operating at 27*16=432 megahertz is required.
A problem with prior art sensing schemes is that any mismatch between the alternate sense amplifiers results in fixed pattern display defects which are difficult or impossible to identify or correct. Moreover, the high frequency binary counter consumes a large amount of power.
Hence, there is a need for an improved sensing circuit which reduces fixed pattern display defects and which reduces power by generating sampling pulses at a lower clock frequency.